In the past there have been two types of power management in computers. A first type is software based which periodically checks to see if computer parts such as the keyboard, the hard disk, the CD drive, and so forth, are being used. If items like the hard drive are no longer being used, the software will typically remove power from the drive motor after a given period of non-use. If the keyboard has not been used for a given time, the display may be removed from the screen and/or power may be removed from the monitor and/or major portions of the CPU. A second type of power control has been labeled in the art as DPM (Dynamic Power Management). Instructions being processed in the computer are monitored and when there are no more instructions to be processed, a DPM module acts to remove clock signals from appropriate portions of the CPU.
It should be noted that there are two types of power usage that occurs in advanced CMOS (Complementary Metal-Oxide Semiconductor) technology. There is active AC power and DC leakage power. As used herein, AC power is that power generated by dynamic dissipation due to switching transient current and charging and discharging of load capacitances. DC leakage power, as used herein, is that power that is generated by static dissipation due to leakage current or other current drawn continuously from the power supply. This DC leakage current, as compared to total current used, increases as CMOS component size decreases.
As noted above, there are many techniques for controlling AC power. These prior art techniques help reduce the AC power component. However, it does not help the DC leakage component because there is still voltage being applied to the circuits. Also, it does not completely shut down the AC component of power.
The architecture of some computers, such as the PowerPC of IBM (International Business Machines), defines a set of architecture control bits in an MSR (Machine State Register). These bits control various functions in the design. One control bit controls the width of the data flow (32 bit or 64 bit). Another bit controls whether there are floating point instructions active.
As known by those skilled in the art, as CPU architectures have evolved, the width of the instruction set architecture has increased to accommodate increases in desired accuracy and processing speed. Original Central Processing Units (CPUs) were 8 bits. Over time, the instruction set data width has been increased to up to 64 bits for present day CPUs. However, even though the width has increased, there remains a considerable amount of software being used which is written for a previous generation's smaller width. Although many of today's CPUs utilize a 64 bit architecture, much of the code used in operating these CPUs is still 32 bits or less. Thus, in many instances of operation, only a portion of the hardware is actively functioning. In other words, if the hardware is designed to accommodate 64 bits, and the software only demands 32 bits, half of the hardware for accommodating the software words is not being used. If the software only demands the use of 16 bits, the software may be using only one-fourth of the hardware. However, even though a portion of the instruction set hardware is not being used, it still, in all known present day CPUs, is using electrical power. The power being used is in the form of clock pulses being applied to data, computation and instruction storage registers as well as DC leakage. Since the power being used is not actively assisting the software, this power is being wasted.
In addition, there are certain workloads which contain only fixed point instructions but contain no floating point instructions.
In view of the above, it would be desirable to deactivate portions of the CPU's circuitry that are not actively engaged in accomplishing steps set forth in the software that is presently being run. Examples of such circuitry being the floating point circuits when there are no floating point instructions in the workload or portions of the computational circuitry when the software running utilizes less than the full instruction width capability of the CPU. It would be further desirable to shut down both the DC leakage power as well as the active AC power for these portions of the CPU.